Memory cells are often characterized as being either write-once or write-many. With a write-once memory cell, an unprogrammed digital state of the memory cell (e.g., logic 1) cannot be restored once it has been switched to a programmed digital state (e.g., logic 0). In contrast, a write-many memory cell (such as a Flash memory cell) allows a user to perform multiple program/erase cycles to the memory cell. While write-many memory cells typically store a single bit of data (representing either a logic 0 or a logic 1), some write-many memory cells can store several bits of data per cell. See, for example, U.S. Pat. No. 6,181,603. Storing multiple bits in a memory cell increases the number of logic states that can be represented by the cell. For example, storing two bits per cell increases the number of logic states that can be stored in a memory cell from two (0 or 1) to four (00, 01, 10, or 11). However, repeated program/erase cycles to the memory cell can make it difficult to reliably read multi-bit data from the memory cell. The high-voltage program/erase disturb of a program/erase cycle can degrade the charge storage device, which decreases the noise margin between logic states stored in the memory cells, making it more difficult or impossible to distinguish one logic level from another.
The present invention is defined by the following claims, and nothing in this section should be taken as a limitation on those claims.
By way of introduction, the preferred embodiments described below provide a memory device and method for reliably reading multi-bit data from a write-many memory cell. In one preferred embodiment, a non-volatile, write-many memory cell operative to store multiple bits is provided, and the number of program/erase cycles to the write-many memory cell is limited. Limiting the number of program/erase cycles increases the probability that multi-bit data will be correctly read from the memory cell. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.
The preferred embodiments will now be described with reference to the attached drawings.